XCENA raises $135M to tackle AI memory bottlenecks

XCENA, an AI chip startup with offices in South Korea and the U.S., has raised $135 million in a Series B funding round. The investment values the company at $570 million and brings its total amount raised to $185 million.

The startup is targeting a structural bottleneck in artificial intelligence infrastructure: the constant transfer of data between processors and memory. Currently, routine data operations require round trips between CPUs, GPUs, and memory. XCENA’s chip, the MX1, connects to the CPU through CXL (Compute Express Link)—a dedicated express lane between the processor and memory—to process data directly within the memory module itself. By placing compute capabilities closer to DRAM (Dynamic Random Access Memory), the company claims that what used to require 10 servers could potentially run on just one. “CPUs and GPUs have both gotten smarter over the decades. Memory never did. XCENA wants to change that,” said CEO Jin Kim.

According to Kim, inference is increasingly a memory scaling problem rather than just a compute problem. He noted that recent rises in memory prices and related stocks point to a broader shift in AI infrastructure toward memory-centric architectures. While GPUs excel at the heavy mathematical matrix multiplication required for AI model training, much of the surrounding data orchestration still runs on CPUs. This includes preprocessing, data caching, and KV cache (Key-Value cache) management—the system that stores prior conversation context so a model does not have to reprocess it. The MX1 handles these tasks directly within the memory module.

The MX1 is currently a prototype. Mass production chips are scheduled to roll off Samsung’s foundry lines by the end of 2026, and the company is expecting to generate revenue starting in 2027. XCENA builds its cores on RISC-V (an open source chip design blueprint) and designs its own internal memory hierarchy, interconnect bus, and DRAM controller. This approach positions the startup against global competitors like Astera Labs and Marvell. Kim stated that XCENA’s chip features thousands of cores, whereas Marvell relies on a handful of general-purpose cores by comparison.

XCENA was founded in 2022 by Kim, CTO Dohun Kim, and CPO Harry Juhyun Kim, who are all veterans of memory giants Samsung and SK Hynix. These firms, alongside Micron, are the memory giants of the industry. The company now has more than 90 staff across its offices.

The Series B funding round was co-led by Seoul-based venture capital firms Atinum and IMM Investment. Other investors in the round include:

• Corstone Asia
• SBI Investment
• Mirae Asset Capital

Why it matters

XCENA is attempting to solve structural inefficiencies in AI infrastructure by moving compute capabilities closer to DRAM, potentially reducing the need for expensive round trips between CPUs, GPUs, and memory.